18 docs tagged with "lecture"

Amhdal's Law

Speedup of Parallel Execution

Cache Coherence in Bus-Based Multiprocessor Systems

For a coherence protocol, write propagation and transaction serialization are key properties. Transaction serialization in a bus-based broadcast protocol is achieved by ensuring that all processors obey the order in which requests are posted on the shared bus. The key problem here to be discussed is to do write propagation.

Cache Coherence Problem

Cache Coherence Issue

Cache Design in Multicore Architecture

Cache Organization

Consistency and Synchronization Problems

Whereas the cache coherence determines the requirement for propagating a change of value in a single address in one cache to other caches and the serialization of those changes, the memory consistency deals with the ordering of all memory operations (loads and stores) to different memory locations.